
Through the consistent use of the variable FPGA technology significant cost and performance benefits are achievable. In particular, the combination of SERCOS III IP cores with an embedded soft processor in one FPGA to a so-called „system on a programmable chip“ or SoPC solution offers many opportunities and advantages..

high flexibility

reduced required space & minimal cost of parts

communication stack and application run either together in the FPGA or can be coupled via DPRAM

microsecond accurate handling of signals without delays or jitter caused by software

real-time functionalities like oversampling, timestamping etc. are possible without additional load of the CPU

enhanced system performance